低位错密度8英寸导电型碳化硅单晶衬底制备

doi:10.15541/jim20230325

无机材料学报 ›› 2023, Vol. 38 ›› Issue (11): 1371-1372.DOI: 10.15541/jim20230325 CSTR: 32189.14.10.15541/jim20230325

所属专题：【信息功能】功能晶体(202506)

• 科技进展 • 上一篇

低位错密度8英寸导电型碳化硅单晶衬底制备

熊希希¹(), 杨祥龙¹(), 陈秀芳¹(), 李晓蒙¹, 谢雪健¹, 胡国杰¹, 彭燕¹, 于国建², 胡小波¹, 王垚浩², 徐现刚¹

1.山东大学晶体材料国家重点实验室, 新一代半导体材料研究院，济南 250100
2.广州南砂晶圆半导体技术有限公司, 广州 511458

收稿日期:2023-07-18 修回日期:2023-08-04 出版日期:2023-08-21 网络出版日期:2023-08-21
通讯作者: 杨祥龙, 副教授. E-mail: yangxl2016@sdu.edu.cn;
陈秀芳, 教授. E-mail: cxf@sdu.edu.cn
作者简介:熊希希(1994-), 男, 博士研究生. E-mail: xiongxixi@summitcrystal.com
基金资助:
国家自然科学基金(52022052);国家自然科学基金(62004118);山东省重点研发计划(2022ZLGX02)

Fabrication of 8-inch N-type 4H-SiC Single Crystal Substrate with Low Dislocation Density

XIONG Xixi¹(), YANG Xianglong¹(), CHEN Xiufang¹(), LI Xiaomeng¹, XIE Xuejian¹, HU Guojie¹, PENG Yan¹, YU Guojian², HU Xiaobo¹, WANG Yaohao², XU Xiangang¹

1. Institute of Novel Semiconductors, State Key Laboratory of Crystal Materials, Shandong University, Jinan 250100, China
2. Guangzhou Summit Crystal Semiconductor Co., Ltd., Guangzhou 511458, China

Received:2023-07-18 Revised:2023-08-04 Published:2023-08-21 Online:2023-08-21
Contact: YANG Xianglong, associate professor. E-mail: yangxl2016@sdu.edu.cn;
CHEN Xiufang, professor. E-mail: cxf@sdu.edu.cn
About author:XIONG Xixi (1994-), male, PhD candidate. E-mail: xiongxixi@summitcrystal.com
Supported by:
National Natural Science Foundation of China(52022052);National Natural Science Foundation of China(62004118);Shandong Province Key R&D Program(2022ZLGX02)

摘要/Abstract

摘要：

碳化硅具有优异的物理化学性能, 在电动汽车、轨道交通、高压输变电、光伏、5G通信等领域具有广泛应用前景。8英寸(1英寸=2.54 cm)SiC衬底在降低器件单位成本、增加产能供应方面具有巨大的潜力, 成为行业重要的技术发展方向。近期山东大学与广州南砂晶圆半导体技术有限公司在8英寸SiC衬底位错缺陷控制方面取得了重大突破, 使用物理气相传输法(Physical vapor transport, PVT)制备了低位错密度8英寸导电型4H-SiC单晶衬底, 其中螺位错(Threading screw dislocation, TSD)密度为0.55 cm^-2, 基平面位错(Basal plane dislocation, BPD)密度为202 cm^-2。

关键词: 4H-SiC, 8英寸, 低位错密度, 单晶衬底

Abstract:

Silicon carbide (SiC) has wide application in electric vehicles, rail transit, high voltage power transmission and transformation, photovoltaic, and 5G communication owing to its excellent physical and chemical properties. 8-inch SiC substrate has great potential in reducing unit cost of devices and increasing capacity supply, and has become an important technology development direction of the industry. Recently, Shandong University and Guangzhou Summit Crystal Semiconductor Co., Ltd. have made a major breakthrough in the control of dislocation defects in 8-inch SiC substrates. The 8-inch n-type 4H-SiC single crystal substrate with low dislocation density has been fabricated by physical vapor transport (PVT) method, of which the threading screw dislocation (TSD) density is 0.55 cm^-2, and the basal plane dislocation (BPD) density is 202 cm^-2.

Key words: 4H-SiC, 8-inch, low dislocation density, single crystal substrate

中图分类号:

TQ174

熊希希, 杨祥龙, 陈秀芳, 李晓蒙, 谢雪健, 胡国杰, 彭燕, 于国建, 胡小波, 王垚浩, 徐现刚. 低位错密度8英寸导电型碳化硅单晶衬底制备[J]. 无机材料学报, 2023, 38(11): 1371-1372.

XIONG Xixi, YANG Xianglong, CHEN Xiufang, LI Xiaomeng, XIE Xuejian, HU Guojie, PENG Yan, YU Guojian, HU Xiaobo, WANG Yaohao, XU Xiangang. Fabrication of 8-inch N-type 4H-SiC Single Crystal Substrate with Low Dislocation Density[J]. Journal of Inorganic Materials, 2023, 38(11): 1371-1372.

图/表 2

图1 8英寸导电型4H-SiC单晶衬底以及对应的BPD密度分布

Fig. 1 8-inch conductive 4H-SiC single crystal substrate and corresponding BPD density distribution (a) 8-inch conductive 4H-SiC single crystal substrate; (b) BPD density mapping

图2 TSD密度为0.55 cm-2的分布图和TSD特征腐蚀坑统计分布

Fig. 2 Distribution of TSD density with 0.55 cm-2 and statistical distribution of TSD characteristic etch pits (a) TSD density mapping; (b) The number of TSDs characteristic etch pits with different sizes

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低位错密度8英寸导电型碳化硅单晶衬底制备

Fabrication of 8-inch N-type 4H-SiC Single Crystal Substrate with Low Dislocation Density

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