高介电栅介质材料研究进展

doi:10.3724/SP.J.1077.2008.00865

无机材料学报

• 研究论文 • 下一篇

高介电栅介质材料研究进展

武德起^1,2,3, 赵红生^1,2,3, 姚金城¹, 张东炎^1,3, 常爱民¹

1. 中国科学院新疆理化技术研究所, 乌鲁木齐 830011; 2. 中国科学院北京半导体所, 北京 100038; 3. 中国科学院研究生院, 北京 100049

收稿日期:2007-10-16 修回日期:2007-12-14 出版日期:2008-09-20 网络出版日期:2008-09-20

Development of High-K Gate Dielectric Materials

WU De-Qi ^{1, 2, 3}, ZHAO Hong-Sheng ^{1, 2, 3}, YAO Jin-Cheng¹, ZHANG Dong-Yan ^{1, 3}, CHANG Ai-Min¹

1. Xinjiang Technical Institute of Physics & Chemistry, Urumqi 830011, China; 2. Institute of Semiconductor, Chinese Academy of Sciences, Beijing 100083, China; 3. Graduate University of the Chinese Academy of Sciences, Beijing 100049, China

Received:2007-10-16 Revised:2007-12-14 Published:2008-09-20 Online:2008-09-20

摘要/Abstract

摘要： 传统的栅介质材料SiO₂不能满足CMOS晶体管尺度进一步缩小的要求, 因此高介电栅介质材料在近几年得到了广泛的研究, 进展迅速. 本文综述了国内外对高介电材料的研究成果, 并结合作者的工作介绍了高介电栅介质在晶化温度、低介电界面层、介电击穿和金属栅电极等方面的最新研究进展.

关键词: 高介电栅介质, 晶化温度, 低介电界面层, 金属栅电极

Abstract:
The traditional gate dielectric material of SiO₂ can not satisfy the need of the continuous downscaling of CMOS dimensions. High-K gate dielectric materials have attracted extensive research efforts recently and obtained great progress. In this paper, the developments of high gate materials were reviewed. Based on the authors background and research work in the area, the latest achievements of high-K gate dielectric materials on the recrystalization temperature, the low-K interface layer, and the dielectric breakdown and metal gate electrode were introduced in detail.

Key words: high-K gate dielectrics, recrystallization temperature, lowK interface layer, metal gate

中图分类号:

武德起,赵红生,姚金城,张东炎,常爱民. 高介电栅介质材料研究进展[J]. 无机材料学报, DOI: 10.3724/SP.J.1077.2008.00865.

WU De-Qi,ZHAO Hong-Sheng,YAO Jin-Cheng,ZHANG Dong-Yan,CHANG Ai-Min. Development of High-K Gate Dielectric Materials[J]. Journal of Inorganic Materials, DOI: 10.3724/SP.J.1077.2008.00865.

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高介电栅介质材料研究进展

Development of High-K Gate Dielectric Materials

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