图4. 基于PET衬底的突触晶体管的研究工作

Fig. 4. Research on synaptic transistor on PET substrate
(a) Physical photograph of the construction of synaptic transistors on a PET substrate; (b) Change of current with time after 20 (4.0 V, 20 ms) pulses being applied to the gate of the synaptic transistor when V_DS at 0.5 V ^[39]; (c) Schematic diagram of spatio-temporal signal integration and memory performed by heterogeneous synapses (with the introduction of noise signals during the transmission of the original signal); (d) Comparison of classification accuracy of two-gate heterogeneous synaptic transistor and single-gate homogeneous synaptic transistor networks^[41]